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Body [LFCSP]; (see https://www.intersil.com/content/dam/Intersil/documents/l72_/l72.10x10c.pdf LFCSP VQ, 24 pin, exposed pad: 4.5x8.1mm, with thermal vias in pads, 5 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py Micro Leadframe Package, 16 pin with exposed pad (http://cds.linear.com/docs/en/datasheet/34301fa.pdf SSOP 0.65 exposed pad (http://cds.linear.com/docs/en/datasheet/34301fa.pdf SSOP 0.65 exposed pad (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-32/ Infineon SO package 20pin without exposed pad (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-87/ 12-Lead Plastic DFN (2mm x 2mm) (see Linear Technology DFN_14_05-08-1708.pdf DFN14, 4x4, 0.5P; CASE 506CN (see ON Semiconductor 506CN.PDF DC8 Package 8-Lead Plastic Dual Flat, No Lead.

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