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BackSize condition "A.Type == 'via' && B.Type == A.Type && A.Net == B.Net" (condition "A.Pad_Type == 'NPTH, mechanical' && B.Type == 'track'" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes Total unplated holes count 16 ============================================================= Total unplated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file Unescape Hardware/PCB/precadsr_Gerbers/precadsr-F_SilkS.gbr Normal file View File 3D Printing/Cases/Eurorack Modular Case/EuroRack_Case_20.png Executable file View File 3D Printing/Panels/AD&D 1e spell names in Filmoscope Quentin/COLOR SPRAY.png differ Binary files /dev/null and b/Schematics/Luthers_Perfboard.pdf differ Binary files /dev/null and b/Panels/luther_triangle_vco_quentin_v3_blank.stl.stl differ Binary files.
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