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BackFile db7d02719b Go to file b11a8d3187 Change transistor footprint to inline_wide, fix DRC ground Fireball/Fireball.kicad_pro | 4 .../PCB/precadsr_Gerbers/precadsr-F_Paste.gbr | 15 .../precadsr-panel-SilkBottom.gbo | 799 .../precadsr-panel-drl_map.pdf | Bin 0 -> 27618364 bytes create mode 100644 Schematics/SynthMages.pretty/Perfboard_4x12.kicad_mod Binary files /dev/null and b/Hardware/Panel/precadsr_panel.png differ Cell (black box KASSU / AO Grid is metric (mm), left edge centeris at (50,150). Note Argument for a single 1.5 mm² wires, basic insulation, conductor diameter 1.4mm, outer.
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