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Back{KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: unplated through holes: unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Latest commits for file Docs/build.md footprint "Perfboard_3x12" (version 20221018) (generator pcbnew 9f9f6acf76 Add notes about UX component wiring initial notes for v1 front panel Added schmancy pcb for v1 build - C1 is too small for film; is film needed? - Smaller cap (476nF?) for C1 Ceramic 104s for C10, C14, might be fine, might introduce intermittents - Don't put R8 so close to R26 D36/R47 too close.
- TRACO TEN10-xxxx single output DC/DC Murata MGJ2DxxxxxxSC, 19.5x9.8x12.5mm.
- Slotted Cap, horizontal, 500 VAC 4W/16A (VDE.