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Tstamp 279a77ec-bb4c-42b3-9906-0ade47adceea) ) Schematic updates Schematic updates tstamp fba516e7-1049-45b0-8dba-0ae3b2bc2d6f) ) Schematic updates main synth_tools/Schematics/SynthMages.pretty/SOCKET_2_PIN_Header.kicad_mod 44 lines 1705ad98fb Put title box in PDF export Schematics/Fireball_VCO.pdf | Bin 0 -> 11675 bytes .../Panels/FIREBALL VCO.png | Bin 11675 -> 0 bytes 6f5ee76aea tracks the ratsnest and compactifies the power subsystem 972d8b1e07 adds front panel 24ca7abc85681936397a2802c8155420fcaf679c Added schmancy pcb for v2 front panel to integer pseudo-origin, remove testing text, decrease title label font size to 9mm and align it precisely for repeatability Change transistor footprint to inline_wide, fix DRC ground Fireball/Fireball.kicad_pro | 4 Hardware/PCB/precadsr/potsetc.sch | 4 | 100 nF | Unpolarized capacitor | | | J1 | 1 | ICM7555xP | CMOS General Purpose Timer, 555 compatible, PDIP-8 Quad operational amplifier, DIP-14"/> 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