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106.172 (grid_origin 121.92 119.38 "Notes": "Layer B.SilkS" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole Total plated holes count 0 Minor layout tweaks Minor layout tweaks Schematics/Fireball_VCO.pdf | Bin 12821 -> 0 bytes Binary files a/Panels/futura medium bt.ttf Normal file Unescape Hardware/Panel/precadsr_panel_al/precadsr_panel_al.sch Normal file View File 3D Printing/Panels/AD&D 1e spell names in Filmoscope Quentin/Panels/BLADE BARRIER.png Normal file View File Panels/label_test.stl Normal file Unescape Hardware/PCB/precadsr_Gerbers/precadsr-B_SilkS.gbr Normal file View File Panels/FireballSpell_Large_bw.xcf Executable file View File Things best left to external modules: CV-controlled CV offset module .

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