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BackBLOCK 5 1C 330 1B 100 AcDbEntity 67 1 8 0 100 AcDbBlockBegin 2 *PAPER_SPACE 1 (min_thickness 0.254) (filled_areas_thickness no Binary files /dev/null and b/Panels/title_test_22.stl differ Binary files a/Schematics/Fireball_VCO.pdf and /dev/null differ main MK_VCO/Fireball/Fireball.kicad_pcb 35767 lines da12ac6a39 Delete '3D Printing/AD&D 1e spell names in Filmoscope Quentin' e825437e5db64d4ef13181f883b9fe719cf4c2a1 Upload files to '3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels/MIRROR IMAGE.png create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Alpha_RD901F-40-00D_Single_Vertical_CircularHoles_centered.kicad_mod create mode 100644 Panels/luther_triangle_vco_quentin_v2.scad create mode 100644 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel.drl create mode 100644 3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels/BLADE BARRIER.png differ Binary files /dev/null and b/Panels/FireballSpellVertSmaller.png differ Binary files /dev/null and b/3D Printing/Panels/HOLD PORTAL.png | Bin 0 -> 104908 bytes Panels/title_test.scad | 27 Panels/title_test.stl | Bin 12821 -> 0 bytes Latest commits for branch v1.1 Finish PCBs d74befe391233bd8b162f7f5705c277e04d9b135 Checkpoint after fixes but before shrinking boards Checkpoint after fixes but before shrinking boards Checkpoint after re-centering sliders, before removing redundant LED resistors next to transistors to save on panel.
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