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File b11a8d3187 Change transistor footprint to inline_wide, fix DRC ground plane Change transistor footprint to inline_wide, fix DRC ground Fireball/Fireball.kicad_pro | 104 Fireball/Fireball.kicad_sch | 1614 main MK_SEQ/Schematics/Unseen Servant/Unseen Servant.kicad_sch | 42 main MK_VCO/Panels/luther_triangle_vco_quentin_v3.scad 306 lines From 6f9500076fac5f379db1f0c8505a728d639b2a3a Mon Sep 17 00:00:00 2001 Subject: [PATCH] re-re-remove the mysterious extra trace 5040873587dbb57684343269abab88d35cf7124b Update Schematics/schematic_bugs_v1.md Schematics/schematic_bugs_v1.md | 1 | B10k | \*\*Potentiometer, 9 mm or 16 mm vertical board mount | | | J12 | 1 | 10 nF Docs/precadsr.pdf | Bin 11916 -> 0 bytes Latest commits for file Synth_Manuals/VALMORIFICATION+Build+and+BOM.pdf MK_VCO/Fireball/Fireball VCO saw wave core.circuitjs.txt 90 lines From a3d4f2b82eccdd8d29ef9e5db4743697c1bc34dd Mon Sep 17 00:00:00 2001 Subject: [PATCH] github url .../PCB/precadsr_Gerbers/precadsr-B_Cu.gbr | 4 .../PCB/precadsr_Gerbers/precadsr-B_Paste.gbr | 15 .../precadsr_panel_al-F_Mask.gbr | 47 .../precadsr_panel_al-F_Paste.gbr | 15 .../precadsr-panel-PasteTop.gtp | 15 .../precadsr-panel-SilkBottom.gbo | 799 .../precadsr-panel-drl_map.pdf | Bin 139972 -> 140153 bytes create mode 100644 (0 F.Cu signal (31 "B.Cu" signal (32 "B.Adhes" user "B.Adhesive" 33 "F.Adhes" user "F.Adhesive" 36 "B.SilkS" user "B.Silkscreen" (37 "F.SilkS" user "F.Silkscreen" 40 "Dwgs.User" user "User.Drawings" 41 "Cmts.User" user "User.Comments" (42 "Eco1.User" user "User.Eco1" 43 "Eco2.User" user "User.Eco2" 46 "B.CrtYd" user "B.Courtyard" 47 "F.CrtYd" user.

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