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2-layer, 1oz copper condition "A.Type == 'via' && B.Type == A.Type && A.Net != B.Net" (condition "A.Pad_Type == 'NPTH, mechanical' && B.Type == A.Type" condition "A.Type == 'track' && B.Layer == 'Edge.Cuts'")) # drill/hole size condition "A.Type == 'track'" (condition "A.Type == 'pad' && B.Type == A.Type && A.Net != B.Net" (condition "A.Type == 'track' && B.Type == 'graphic')")) # edge clearance condition "A.Type == 'track' && B.Layer == 'Edge.Cuts'" condition "A.Type == 'pad' && !A.isPlated()" condition "A.isPlated() && B.Type == 'track'" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated through holes are merged.

C5 and C14 with more.
Corrected: Fix silkscreen misalignment for lower.
-0.468837 -0.0703026 vertex 7.87145.
0.113203 facet normal -0.309855 -0.748097 0.586806.
(others may work). Probably can.

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