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Could use fewer caps that way PSU/psu.diy Executable file View File Images/PXL_20210831_004139245.jpg Normal file View File b404e3f9c5 Update luther's layout Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated.

• -1.1 -0.47 (end 0.525 -0.27 (end -1.9.
• | R3, R21, R27, R28.
• Holes Total unplated holes count.

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