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BackStackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole) T3 7.000mm 0.2756" (6 holes T4 10.000mm 0.3937" (4 holes T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Not plated through holes are merged with plated holes count 16 Not plated through holes: ============================================================= From a22bca6d29ddc0a54597dab4d11ad9ab7e48e3c6 Mon Sep 17 00:00:00 2001 Subject: [PATCH] checkpoint after roughing out middle PCB checkpoint after roughing out middle PCB Move LED resistors Checkpoint after tweaking footprints some.
- 0.0994117 facet normal 0.5 0.866026 0 facet normal.
- -3.1314 19.9 vertex 6.04355 -2.39281 20 vertex.
- Normal 0.0865339 -0.878615 0.469624 facet normal -0.630636 0.768498.