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Report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated through holes: merged pull request 'Finish schematic, add PDF 2d3c489f2a More SR1 notation main master PSU/Synth Mages Power Word Stun Panel.kicad_pcb 5e32fb4fc0 Go to file 2cbdb94ba9 updated C5 footprint & tracing; schematic annotation 2cbdb94ba94f485ce4abcb1f14e2e5f15d016647

• Holes (A-screw), horizontal PCB mount.
• Normal 2.502911e-15 -1.000000e+00 -1.026775e-14 facet normal -0.629653.

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