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Quentin/Panels/POLYMORPH.png' ec89d624dc Delete '3D Printing/Panels/SPIDER CLIMB.png' 54fe483060 Delete '3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels/MAGIC MISSILE VCF.png' Delete '3D Printing/AD&D 1e spell names in Filmoscope Quentin/FIREBALL VCO.png create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Arduino_Nano.kicad_mod create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Molex_KK-254_AE-6410-08A_1x08_P2.54mm_Vertical.kicad_mod create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/CP_Radial_D6.3mm_P2.50mm.kicad_mod delete mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/PinHeader_1x03_P2.54mm_Vertical.kicad_mod delete mode 100644 3D Printing/Rails/36hp_outie.stl create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/analogoutput.kicad_mod create mode 100644 3D Printing/Panels/AD&D 1e spell names in Filmoscope Quentin/MAGIC MISSILE VCF.png | Bin 0 -> 10724 bytes .../Panels/MAGIC MISSILE VCF.png Normal file View File 3D Printing/Cases/Eurorack Modular Case/DSC03768.JPG Executable file View File Hardware/Panel/precadsr_panel_al_Gerbers/precadsr_panel_al-NPTH.drl Normal file View File 3D Printing/Pot_Knobs/Knob_Factory.scad Executable file View File Panels/FireballSpellVertSmaller.png Normal file View File # ENV Envelope generator main VCA/Schematics/Dual_VCA_with_cv2_OTA.diy 7462 lines PSU/Synth Mages Power Word Stun.kicad_pcb alternate "" input line From 5505000471ab249f70d985a8f814bce077fb47b2 Mon Sep 17 00:00:00 2001 Subject: [PATCH] gets comfier with gitignore and git rm --cache learns about gitignore and git rm --cache 713014315986726ad96f361cfbc8e67551a6a879 power word stun initial commit by power word stun initial commit by Synth Mages Power Word Stun.kicad_pro create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/DIP-14_W7.62mm_Socket_LongPads.kicad_mod create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Perf_Board_Hole.kicad_mod delete mode 100644 Schematics/SynthMages.pretty/Micro SPDT (3 pin).kicad_mod 51 lines 720296ca7c Pain Train alt tag, Alice Grove bigger img 4d8e233e93 Add CV in to pause the clock feature/seq_chaining Checkpoint before trying to add picture Schematics/{schematic_bugs_v1.txt => schematic_bugs_v1.md} | 3 | AudioJack2 | Audio Jack, 2 Poles (Mono / TS)"/> Name="+12V" type="passive"/> Operational amplifier, DIP-8

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