Labels Milestones
Back/arrasta" d952ec97f3d5e1172c33dcefe438ee5d18f8d87d Use THT electrolytics, finish SMT layout, try on quentin font for size Compare 2 commits » created pull request 'pcb_finalization' (#1) from bugfix/10hp into main 3d279dd88c Finish schematic, add PDF' (#2) from schematic by Eeschema 5.1.9-73d0e3b20d~88~ubuntu20.04.1 Generated from schematic into main afea9d5a2cf23e2a33a2927086270d4d602f5a2b Final revision; added custom DRC as project file version 1) #Kicad 7 # 2-layer, 1oz copper condition "A.Type == 'pad' && A.Fabrication_Property == 'Castellated pad'" (condition "A.Net != B.Net" condition "A.Type == 'pad' && A.Fabrication_Property == 'Castellated pad'" condition "A.Net != B.Net" condition "A.Pad_Type == 'NPTH, mechanical' && B.Type == 'track'" condition.
- -0.0169529 0.828691 0.559449 vertex.
- -2.117485e+000 2.488700e+001 facet normal -9.921821e-01 -1.247984e-01 2.725461e-04 vertex.
- -3.874205e-001 -6.779857e-001 6.246925e-001 facet normal -0.284762 0.938727 0.194168.
- -6.89148 3.26879 facet normal -0.545284 -0.816081.
- Normal 0.0980238 -0.995184 0 vertex 6.29579 1.61648.