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Back13:40:31 2021 ; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Thu Aug 12 11:11:04 2021 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes count 16 Not plated through holes: merged pull request 'More schematics' (#3) from schematic by Eeschema 5.1.10-88a1d61d58~88~ubuntu20.04.1 | Refs | Qty | Component | Description | Manufacturer | Part | Vendor | SKU | | R2, R5 | 2 | 1 | 2_pin_Molex_connector | 2 | 1M | Resistor | | | | R25, R27, R29 | 3 | AudioJack2 | Audio Jack, 2 Poles (Mono / TS), Switched T Pole (Normalling) | | | R15, R17, R19 | 2 | 1N5817 | Schottky Barrier Rectifier Diode, DO-41
- Pitch 20.80mm length 48.8mm width 25.4mm Vishay TJ5.
- Holes distance 25mm 15-pin D-Sub connector.
- .../precadsr-panel-PasteTop.gtp | 15 .../precadsr-panel-PasteTop.gtp | 15.
- Connector, S12B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated.