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Differ # 2-layer, 1oz copper condition "A.Type == 'pad' && A.Fabrication_Property == 'Castellated pad'" (condition "A.Net != B.Net" condition "A.Type == 'track'" (condition "A.isPlated() && B.Type == A.Type")) # 4-layer condition "A.Type == 'pad' && A.Fabrication_Property == 'Castellated pad'" (condition "A.Net != B.Net" condition "A.Type == 'pad' && (B.Type == 'text' || B.Type == A.Type && A.Net == B.Net" condition "A.Type == 'track'" condition "A.Type == 'via' && B.Type == A.Type && A.Net != B.Net" (condition "A.Pad_Type == 'NPTH, mechanical' && B.Type == 'track'" (condition "A.Type == 'track' && B.Layer == 'Edge.Cuts'" condition "A.Type == 'pad' && !A.isPlated()" (condition "A.Type == 'pad' && B.Type == A.Type && A.Net == B.Net" condition "A.Pad_Type == 'NPTH, mechanical' && B.Type == A.Type && A.Net != B.Net" (condition "A.Type == 'pad' && B.Type == A.Type && A.Net == B.Net" condition "A.Type == 'via'" (condition "A.Type == 'pad' && B.Type == 'track'" (condition "A.Type == 'track' && B.Layer == 'Edge.Cuts'")) # drill/hole size condition "A.Type == 'pad' && B.Type == 'track'" (condition "A.Type == 'track' && B.Layer == 'Edge.Cuts'" condition "A.Type == 'via' && B.Type == 'track'" condition "A.Type == 'track'" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Latest commits for file Schematics/Dual_VCA_with_cv2_OTA.diy Start of LM13700 version to see why 0d3d72c49e606725216a5a9a4217e6c039d5a574 2d3c489f2acf0f8bdc9cf0fe8c2346d4d07472be d952ec97f3d5e1172c33dcefe438ee5d18f8d87d Start of LM13700 version to see why 531ebcae92ad8ad00635060e3583259ee13cc12b 2bd01a1ff2d30ca3cff647bbf3b80645437cc07c start 77735c00cc3285131373f5cfc61b82eab5963d12 Update README.md README.md | 3 | A1M | \*\*Potentiometer, 16.

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