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Vertex 3.043209e+000 -6.442358e+000 9.983999e+000 vertex 5.622908e+000 -8.258408e-001 1.747200e+001 facet normal -0.0373292 0.272847 0.961333 facet normal 4.926586e-001 -8.446026e-001 2.096043e-001 vertex -2.015217e+000 3.450173e+000 2.475471e+001 facet normal -0.992167 -0.100994 0.0735183 facet normal 0.115912 -0.000107246 0.993259 facet normal -0.773008 -0.634396 -2.13618e-06 facet normal 0.993074 0.0629615 0.0991953 facet normal -0.0908696 -0.0438181 -0.994898 vertex -9.29416 -3.67731 0.046549 vertex -9.29343 3.67953 0.0465801 facet normal -2.801356e-02 9.996075e-01 3.524119e-04 facet normal -0.603867 -0.370049 0.705981 facet normal 0.382434 -0.0376634 0.923215 facet normal 0.0729058 0.338907 0.937991 facet normal -0.544084 -0.22536 0.808199 vertex 5.88976 -0.759069 19.1916 vertex 5.15907 1.48976 19.1916 facet normal 0.479434 0.871941 0.0993106 facet normal -4.916137e-001 8.452109e-001 2.096056e-001 vertex 6.241365e-001 -4.334503e+000 2.470218e+001 facet normal -0.993083 -0.0624772 0.0994134 vertex -9.92115 1.25333 0 vertex 9.8813 2.36142 0 vertex -9 0 4.51215 vertex -9 0 4.51215 vertex 0 10.1904 0 0 N Y 1 F N DEF SW_SPST_Lamp SW 0 0 Y N 1 F N DEF SW_SPDT_MSM SW 0 40 Y N 1 F N DEF LM3900N U 0 5 Y Y 1 F N Binary files a/Schematics/Fireball_VCO.pdf and /dev/null differ a3d4f2b82e romps with traces, vias, and net links romps with traces, vias, and net links 06eccf7d9c added the once through idea with commentary by Correcting changed filename in .prl 54f1a61ba5 gets jiggy with PCB locator, 6 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator Harwin Female Vertical Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89009xx, 9 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator JST EH series connector, BM03B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py Nexperia wafer level chip-size package; 15 bumps (6-3-6), 2.37x1.17mm, 15 Ball, 6x3 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g071eb.pdf ST WLCSP-36, ST die ID 494, 3.3x3.38mm, 49 Ball, 7x7 Layout, 0.8mm Pitch, https://www.micron.com/-/media/client/global/documents/products/data-sheet/dram/ddr3/4gb_ddr3l.pdf#page=27 FBGA-96, 14.0x8.0mm, 96 Ball, 9x16 Layout, 0.8mm Pitch, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-bga/05081600_0_bga49.pdf https://www.analog.com/media/en/technical-documentation/product-information/assembly-considerations-for-umodule-bga-lga-package.pdf BGA 324 0.8 CS324 CSG324 BGA 324 0.8 CS324 CSG324 BGA 324 0.8 CS324 CSG324 BGA 324 0.8 GateMate FPGA Maxim WLP-12, W121H2+1, 2.008x1.608mm, 12 Ball, 4x3 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g431c6.pdf ST WLCSP-49, ST die ID 464, 2.58x3.07mm, 36 Ball, 6x6 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32wb55vc.pdf Texas Instruments DSBGA BGA YZP R-XBGA-N6 Texas Instruments, BGA Microstar Junior, 5x5mm, 80 ball 9x9 grid, NSMD pad definition Appendix A BGA 484 1 FG484 FGG484 Artix-7 BGA, 16x16 grid, 17x17mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=280, NSMD pad definition (http://www.ti.com/lit/ml/mpbg674/mpbg674.pdf, http://www.ti.com/lit/wp/ssyz015b/ssyz015b.pdf UCBGA-36, 6x6.

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