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Back*-backups *.kicad_prl *.sch-bak *~ _autosave-* *.tmp *-save.pro *-save.kicad_pcb fp-info-cache # Netlist files (exported from Eeschema) *.net # Autorouter files (exported from Eeschema # Autorouter files (exported from Pcbnew *.ses # Exported BOM files *.xml *.csv # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: T5 15.200mm 0.5984" (1 hole Total plated holes count 0 Minor layout tweaks Finish schematic, add PDF Compare 3 commits from bugfix/v1.1 into main pull from: bugfix/v1.1 merge into: synth_mages:main Add position for resistor between coarse and +12V, value unknown 5a4e89eea63bf71c8fd68e1168f096dfb3459aa4 More cleanup More cleanup Schematics/Fireball.kicad_sch | 4790 Schematics/Fireball_VCO.pdf | Bin.
- -0.290475 0.0341519 0.956273 facet normal -0.682457.
- Normal 0.449653 0.547907 0.705415 facet normal -9.843857e-01 0.000000e+00.
- 1803387 8A 160V Generic.