3
1
Back

Layout, no traces "solder_mask_clearance": 0.0, PCB initial layout, no traces a3181ad06b Add correct footprints to fireball Minor layout tweaks Finish schematic, add PDF' (#2) from schematic into main afea9d5a2cf23e2a33a2927086270d4d602f5a2b Final revision; added custom DRC as project file 8976a63dc06fa25beedf8d2553931872c491047e adds README.md file adds README.md file again gets.

New Pull Request