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Back*.bak *.bck *.kicad_pcb-bak *.kicad_sch-bak *-backups */fp-info-cache *.kicad_prl *.sch-bak *~ _autosave-* *.tmp *-save.pro *-save.kicad_pcb fp-info-cache *.lck # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= 14162964f93e8c9aadec1d2edfbf49ea0b8bcb52 Add MK manuals e49f4ab127 Add Kick as separate sheet Add Kick as separate sheet .../OttosIrresistableDance.kicad_pro | 11 Documentation, some cosmetic sh/PCB updates Docs/precadsr.pdf | Bin 69774 -> 0 bytes From cb59d1e9c06865f5bebe8c7ee0afa4859e0766b2 Mon Sep 17 00:00:00 2001 .../Panels/UNSEEN SERVANT.png | Bin 0 -> 71984 bytes 3D Printing/Rails/36hp_outie.stl create mode 100644 Examples/EG_MANUAL.pdf 3D Printing/AD&D 1e spell names in Filmoscope Quentin/MIRROR IMAGE.png Normal file View File 3D Printing/Cases/Eurorack Modular Case/EuroRack_Case_End_Female.png Executable file View File 3D Printing/Pot_Knobs/Pot2.STL Executable file View File 3D Printing/Pot_Knobs/pot_knobs_assortment.3mf Executable file View File 3D Printing/Rails/36hp_outie.stl | Bin 0 -> 169284 bytes create mode 100644 (0 F.Cu signal (31 B.Cu signal (32 B.Adhes user (33 F.Adhes user (34 B.Paste user (35 "F.Paste" user (36 "B.SilkS" user "B.Silkscreen" 37 "F.SilkS" user "F.Silkscreen" 40 "Dwgs.User" user "User.Drawings" 41 "Cmts.User" user "User.Comments" 42 "Eco1.User" user "User.Eco1" (43 "Eco2.User" user "User.Eco2" (44 "Edge.Cuts" user (45 Margin user (46.
- 0.308981 0.0243251 0.950757 facet normal 0.0819028.
- -1.084784e+02 9.695134e+01 1.075295e+01 facet normal -0.554748 0.0546376 0.830223.
- Coupled Double Inductor SMD 1812.
- = 14.30mm, http://www.vishay.com/docs/30217/cpsl.pdf Resistor Axial_Shunt series Box.