3
1
Back

Package 20pin with exposed pad 4.5x7mm (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-71/ Infineon SO package 20pin without exposed pad (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-87/ 12-Lead Plastic DFN (3mm x 3mm) (see Linear Technology DFN_32_05-08-1734.pdf DFN44 8.9x5, 0.4P; CASE 506BU-01 (see ON Semiconductor 506CE.PDF DD Package; 14-Lead Plastic DFN (2mm x 2mm), http://ams.com/eng/content/download/950231/2267959/483138 DD Package; 8-Lead Plastic Dual Flat, No Lead Package (MF) - 6x5 mm Body [SOIC], pin 7 removed (Microchip Packaging Specification 00000049BS.pdf 44-Lead Plastic Thin Quad Flatpack (PF) - 14x14x1 mm Body, 2.00 mm Footprint [HTQFP] thermal pad TQFP64 7x7, 0.4P CASE 932BH (see ON Semiconductor 932AZ.PDF TQFP128 14x14 / TQFP120 CASE 932AZ (see ON Semiconductor 506CM.PDF DFN, 14 Pin (JEDEC MO-153 Var BE https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator connector JST PH series connector, SM07B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator Soldered wire connection with double feed through strain relief.

New Pull Request