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Gates. Variable step count, 1-10 steps possible (with 2-3 extra switch positions to re-use for frequently-swapped positions). External reset via momentary push button. CV out, with probably +12v gates. Variable step count, 1-10 steps possible (with 2-3 extra switch positions to re-use for frequently-swapped positions). External reset via momentary push button. - Play continuously or play once (switch to select mode, then use manual reset (sw16 // clock out (j5/j12) // glide in (sleeve and normal both GND) 6x Sockets, 2pin: - all step switches (all go to same bus) - run/stop 2x Pushbutton switches, all 2pin: - reset Pots, 3-pin: - Glide attenuator (B10k) (join two left pins from below - Clock in socket with 80 contacts AT ISA 16 bits Bus Edge Connector x1 http://www.ritrontek.com/uploadfile/2016/1026/20161026105231124.pdf#page=70 Highspeed card edge card connector socket for 2.36mm PCBs, vertical, alignment pins (source: https://suddendocs.samtec.com/prints/hsec8-1xxx-xx-xx-dv-x-xx-footprint.pdf 0.8 mm BGA-64, 10x10 raster, 9x9mm package, pitch 0.65mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32l152zc.pdf WLCSP-64, 8x8 raster, 4.539x4.911mm package, pitch 0.4mm; see section 36.2.3 of http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-42363-SAM-D11_Datasheet.pdf WLCSP-56, 7x8 raster, 3.170x3.444mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f303r8.pdf WLCSP-49, 7x7 raster, 2.999x3.185mm package, pitch 0.4mm; see section 6.1 of http://www.st.com/resource/en/datasheet/stm32f103ze.pdf Lattice caBGA-381 footprint for ECP5 FPGAs, 27.0x27.0mm, 756 Ball, 32x32 Layout, 0.8mm Pitch, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-bga/05081600_0_bga49.pdf https://www.analog.com/media/en/technical-documentation/product-information/assembly-considerations-for-umodule-bga-lga-package.pdf BGA 324 0.8 CS325 CSG235 Spartan-7 BGA, 15x15 grid, 13x13mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32f446ze.pdf UFBGA-169, 13x13 raster, 7x7mm package, pitch 0.8mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f303zd.pdf WLCSP-100, 10x10 raster, 4.201x4.663mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f051t8.pdf UFBGA-100, 12x12 raster, 10x10mm package, pitch 0.5mm; see section 6.1 of http://www.st.com/resource/en/datasheet/stm32f405og.pdf WLCSP-100, 10x10 raster, 8x8mm package, pitch 0.4mm; https://www.latticesemi.com/view_document?document_id=213 UFBGA-15, 4x4, 3x3mm package, pitch 0.4mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f100v8.pdf TFBGA-100, 10x10 raster, 4.618x4.142mm package, pitch 0.5mm; see section 7.4 of http://www.st.com/resource/en/datasheet/DM00366448.pdf WLCSP-168, 12x14 raster, 4.891x5.692mm package, pitch 0.4mm pad, 15x15mm, 289 Ball, 17x17 Layout, 0.8mm Pitch, https://www.ti.com/lit/ml/mpbg777/mpbg777.pdf BGA 289 0.8 ZAV S-PBGA-N289 Texas Instruments, DSBGA, 3.0x1.9x0.625mm, 28 ball 7x4 area grid, NSMD, YZP0005 pad definition, 0.95x1.488mm, 6 Ball, 2x3 Layout, 0.5mm Pitch, https://www.adestotech.com/wp-content/uploads/AT25SL321_112.pdf#page=75 WLCSP 12 1.56x1.56 https://ae-bst.resource.bosch.com/media/_tech/media/datasheets/BST-BMM150-DS001-01.pdf WLCSP-12, 6x4 raster staggered array, 1.403x1.555mm package, pitch 0.8mm; see section 7.5 of http://www.st.com/resource/en/datasheet/DM00340475.pdf WLCSP-66, 9x9 raster, 4x4mm package, pitch 0.8mm TFBGA-121, 11x11 raster, 10x10mm package, 0.5mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=260, NSMD pad definition Appendix A Artix-7 BGA, 22x22 grid, 23x23mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=301, NSMD pad definition Appendix A BGA 484 0.8 CLG484 CL484 CLG485 CL485.

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