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Href="https://gitea.circuitlocution.com/synth_mages/precadsr">synth_mages/precadsr master PSU/Synth Mages Power Word Stun Panel.kicad_pcb create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/SOT-23_Handsoldering.kicad_mod delete mode 100644 .gitmodules delete mode 100644 Hardware/PCB/precadsr_aux_Gerbers/precadsr-Edge_Cuts.gbr create mode 100644 Hardware/PCB/precadsr_aux_Gerbers/precadsr-F_SilkS.gbr create mode 100644 Hardware/PCB/precadsr_aux_Gerbers/precadsr-F_SilkS.gbr create mode 100644 Hardware/Panel/precadsr_panel_al_Gerbers/precadsr_panel_al-F_SilkS.gbr From 8de432ba4663cc4e208cff778a114b9ae41e7906 Mon Sep 17 00:00:00 2001 Subject: [PATCH] AD&D 1e spell names in Filmoscope 3D Printing/Panels/AD&D 1e spell names in Filmoscope Quentin/Panels/MAGIC MISSILE VCF.png | Bin 13962 -> 6771 bytes c852e5d6ad Go to file f6c7924538 Messing around with panel alignment before printing f6c7924538ef12da2abc179ebcc8f08e4164e698 main synth_tools/Schematics/SynthMages.pretty/eurorack_rail_hole.kicad_mod 24 lines Binary files /dev/null and b/Images/PXL_20210831_000922493.jpg differ Binary files /dev/null and b/Panels/luther_triangle_10hp.stl differ Binary files /dev/null and b/Docs/precadsr_layout_front.pdf differ Tayda 6096366E - 2 x 6mm drills 3 pin Molex header 2.54 mm spacing Pin header 2.54 mm spacing | Tayda | A-804 | | U2 | 1 | 2_pin_Molex_header | 2 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole) Total plated holes unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole T3 7.000mm 0.2756" (6 holes T4 10.000mm 0.3937" (4 holes T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Not plated through holes: ============================================================= 77735c00cc3285131373f5cfc61b82eab5963d12 Update README.md * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf) * [BOM](Docs/precadsr_bom.md) * [Build notes](Docs/build.md) How to apply the Apache license: Copyright (c) 2017 Benjamin Scher Purcell Permission to use, copy, modify, sublicense or.

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