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Holes are merged with plated holes count 16 ============================================================= Total unplated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file View File main precadsr/Docs/precadsr_bom.md 59 lines Latest commits for file Schematics/SynthMages.pretty/PinSocket_1x03_P2.54mm_Vertical.kicad_mod From 39468ba64a4f39e10d2654c9320f0499f41d363f Mon Sep 17 00:00:00 2001 Subject: [PATCH] Initial version *.dsn *.ses Latest commits for file PSU/psu.diy Add PSU Latest commits for file Schematics/SynthMages.pretty/C_Rect_L22.0mm_W6.1mm_P20mm_MKT_BIG_RED_CAP.kicad_mod (grid_origin -1.27 106.172 (grid_origin 121.92 119.38 "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer F.Mask" "Notes": "Layer B.Mask" "Notes": "Layer F.Mask" "Notes": "Layer F.Paste" "Notes": "Layer B.Paste" "Notes": "Layer F.SilkS" "Notes": "Layer B.Paste" "Notes": "Layer B.Cu" "Notes": "Layer B.Cu" "Notes": "Layer B.Paste" "Notes": "Layer F.Mask" "Notes": "Layer B.Cu" "Notes": "Layer F.Mask" "Notes": "Layer B.Paste" "Notes": "Layer F.Paste" "Notes": "Layer B.Mask" "Notes": "Layer F.Mask" "Notes": "Layer F.SilkS" "Notes": "Layer B.Paste" "Notes": "Layer F.SilkS" "Notes": "Layer F.Paste" "Notes": "Layer B.Paste" "Notes": "Layer B.Paste" "Notes": "Layer F.SilkS" "Notes": "Layer F.Mask" "Notes": "Layer F.Paste" "Notes": "Layer B.Paste" "Notes": "Layer B.Paste" "Notes": "Layer F.Paste" "Notes": "Layer F.Paste" "Notes": "Layer B.Cu" "Notes": "Layer F.Mask" "Notes": "Layer F.SilkS" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Sat Aug 7 13:39:59 2021 ; FORMAT={-:-/ absolute / inch / decimal} Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel.gbrjob Normal file Unescape Hardware/PCB/precadsr/Kosmo_panel.pretty/fastestenv_Switch_Hole.kicad_mod Normal file Unescape Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CuTop.gtl Normal file Unescape Schematics/SynthMages.pretty/eurorack_rail_hole.kicad_mod Normal file Unescape Mon 19 Apr 2021 10:22:18 AM EDT Generated from schematic into main v1 Final tweaks, version submitted to Licensor.

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