Labels Milestones
BackCopper Layer Stackup: T5 15.200mm 0.5984" (1 hole) Total plated holes Total unplated holes count 16 Not plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Not plated through holes are merged with plated holes Total unplated holes count 16 Latest commits for file Fireball/Fireball.kicad_prl couple more minor clearance tweaks couple more GND-stitch vias Undo converting GND to GND_JMP and fix everything that broke Finished PCB, passes all passable DRCs Show-stopping bugs needing bodges: Errant connection between R25 and R1, probably a result of Your.
- Walls. Clf_wall = 2; left_col .
- -0.0463777 0.880973 facet normal 4.127382e-001 -7.075882e-001 5.735556e-001.