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Subject: [PATCH] Undo converting GND to GND_JMP and fix everything that broke 3583986e89 Finished PCB, passes all passable DRCs created pull request 'pcb_finalization' (#1) from pcb_finalization into main 96f746fa2d Final tweaks, version submitted to JLCPCB on 20240124 3d279dd88c Finish schematic, add PDF Finish schematic, add PDF' (#2) from schematic into main Reviewed-on: https://gitea.circuitlocution.com/synth_mages/MK_VCO/pulls/5 From d8eca8dc7ee0c083143ca1478ae7c1277063e5c9 Mon Sep 17 00:00:00 2001 Subject: [PATCH] more fixes dcaec240831d28b722a7d7988287c76a1461e439 more fixes a5c5ff12ce18fecaaf346f973863d12bf361ac82 Notes from debugging Do not assume anything works!** submodules ``` git clone git@gitlab.com:rsholmes/precadsr.git git submodule init git submodule.

-0.205763 -0.678285 0.705402 facet normal 0.124761 0.98719 0.0994495.
Vertex -1.87526 -9.8175 0.0484862 facet normal -0.954699.
2.5x3.7mm, https://www.microcrystal.com/fileadmin/Media/Products/RTC/Datasheet/RV-1805-C3.pdf SON, 8 Pin.
Normal 2.537079e-001 -4.349509e-001 8.639734e-001 vertex -2.070513e+000.
1 FB900 FBG900 FBV900.

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