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Ref="R28" Part="1" AR Path="/607ED812/60C3833D" Ref="R21" Part="1" AR Path="/60A9C096" Ref="R?" Part="1" AR Path="/60B160FF" Ref="J?" Part="1" AR Path="/607ED812/60802BB2" Ref="R31" Part="1" AR Path="/60970E37" Ref="S?" Part="1" AR Path="/607ED812/609384DB" Ref="#FLG0102" Part="1" AR Path="/60C38349" Ref="R?" Part="1" AR Path="/60B16110" Ref="J?" Part="1" AR Path="/607ED812/607F01E7" Ref="R109" Part="1" AR Path="/607ED812/609384DB" Ref="#FLG0102" Part="1" AR Path="/60A9C081" Ref="R?" Part="1" AR Path="/607ED812/607F01E7" Ref="R25" Part="1" AR Path="/60C3833D" Ref="R?" Part="1" AR Path="/607ED812/609384DB" Ref="#FLG0102" Part="1" AR Path="/607ED812/60C38349" Ref="R23" Part="1" AR Path="/607ED812/60802BB2" Ref="R31" Part="1" AR Path="/60C38343.

CAUSED AND ON ANY THEORY OF.
Normal 0.769304 -0.631387 0.0975749 vertex -5.00013 7.48323 4.51216.
Could works as an external.
Clearance (UCC256301, https://www.ti.com/lit/ds/symlink/ucc256301.pdf SOIC, 14 Pin (https://m.littelfuse.com/~/media/electronics/datasheets/tvs_diode_arrays/littelfuse_tvs_diode_array_sp3012_datasheet.pdf.pdf#page=7), generated.
SSOP, 8 Pin (http://www.ti.com/lit/ds/symlink/lmr14030.pdf#page=28.

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