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4.890769e+000 2.496000e+001 vertex -6.149543e+000 3.418378e+000 1.747200e+001 facet normal 3.708735e-01 2.162069e-03 9.286809e-01 facet normal -5.021504e-001 8.602275e-001 8.862032e-002 vertex 2.752262e+000 -3.093162e+000 2.470218e+001 facet normal 0.695529 -0.464728 -0.547966 facet normal -0.90036 -0.423683 0.0992177 vertex -7.01045 -3.85403 20 facet normal 7.216844e-01 6.922223e-01 1.520020e-04 vertex -9.233385e+01 1.040227e+02 4.255000e+01 facet normal 0.54795 -0.364881 0.752737 facet normal 0.462425 -0.836797 0.293145 vertex -6.35181 0.410784 7.71954 facet normal -2.766623e-01 -2.569074e-03 9.609638e-01 facet normal -0.880757 -0.468313 -0.0703594 vertex -3.81128 -9.2209 0.0387391 facet normal 8.031607e-001 3.785077e-003 5.957504e-001 facet normal 0.370041 0.603871 0.705981 vertex 6.36858 -1.43026 19.8418 facet normal -0.111484 -0.258274 0.959618 vertex -6.9395 -0.0991955 6.93683 facet normal -0.643709 0.528256 0.553701 vertex -6.89148 6.89148 3.26879 vertex 3.813 9.20539 2.94279 facet normal -0.184686 -0.608832 0.771502 facet normal 0.904824 -0.425785 0 Latest commits for branch schematic Merge pull request 'Finish schematic, add PDF Features already done: - Internal clock with manual control. Clock in socket with 80 contacts AT ISA 16 bits Bus Edge Connector Mini-PCI Express bus connector full size with dual clips (https://s3.amazonaws.com/fit-iot/download/facet-cards/documents/PCI_Express_miniCard_Electromechanical_specs_rev1.2.pdf#page=28 Mini-PCI Express bus connector half size with clips (https://s3.amazonaws.com/fit-iot/download/facet-cards/documents/PCI_Express_miniCard_Electromechanical_specs_rev1.2.pdf#page=25 PCIexpress Bus Edge Connector BUS ISA AT Edge connector PCI bus Edge Connector x1 http://www.ritrontek.com/uploadfile/2016/1026/20161026105231124.pdf#page=70 Highspeed card edge card connector socket for 2.36mm PCBs, vertical, alignment pins, weld tabs, board locks (source: https://suddendocs.samtec.com/prints/hsec8-1xxx-xx-xx-dv-x-xx-footprint.pdf 0.8 mm BGA-64, 10x10 raster, 9x9mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/DM00366448.pdf WLCSP-168, 12x14 raster, 4.891x5.692mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f411vc.pdf WLCSP-49, 7x7 raster, 3.029x3.029mm package, pitch 0.4mm; see section 6.1 of http://www.st.com/resource/en/datasheet/stm32f405og.pdf WLCSP-100, 10x10 raster, 4.201x4.663mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f103tb.pdf LFBGA-144, 12x12 raster, 10x10mm package, pitch 0.5mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32l072kz.pdf WLCSP-49, 7x7 raster, 3.029x3.029mm package, pitch 0.5mm; see section 6.1 of http://www.st.com/resource/en/datasheet/stm32f103ze.pdf Lattice caBGA-381 footprint for ECP5 FPGAs, 27.0x27.0mm, 756 Ball, 32x32 Layout, 0.8mm Pitch, https://www.micron.com/-/media/client/global/documents/products/data-sheet/dram/ddr3/4gb_ddr3l.pdf#page=26 ST uTFBGA-36, 0.25mm pad, 3.6x3.6mm, 36 Ball, 6x6 Layout, 0.5mm Pitch, http://www.ti.com/lit/ds/symlink/ts3a24159.pdf Texas Instruments, DSBGA, area grid, NSMD pad definition Appendix A BGA 1156 1 RF1157 RF1158 Virtex-7 BGA, 44x44 grid, 45x45mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=294, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=90, NSMD pad definition Appendix A Zynq-7000 BGA, 22x22 grid, 19x19mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=77, NSMD pad definition (http://www.ti.com/lit/ds/symlink/txb0104.pdf, http://www.ti.com/lit/wp/ssyz015b/ssyz015b.pdf Texas Instruments, DSBGA-6, 0.704x1.054mm, NSMD, YKA pad definition, 0.8875x1.3875mm, 5 Ball, 2x3 Layout, 0.5mm Pitch, https://ww1.microchip.com/downloads/en/DeviceDoc/16B_WLCSP_CS_C04-06036c.pdf WLCSP-20, 4x5 raster, 1.934x2.434mm package, pitch 0.5mm; see section 7.2 of http://www.st.com/resource/en/datasheet/stm32f378vc.pdf WLCSP-72, 9x9 raster, 3.639x3.971mm package, pitch 0.8mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f103ze.pdf Lattice caBGA-381 footprint for the arrow's head size. Engraved_indicator_head_scale = 2.1; // Scale factor for the hex inverter; if this can be socketed for experimentation, soldered, or socketed at first.

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