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File Fireball/Fireball.kicad_sch Added input resistor for sync; placed everything on PCB with exploratory 8hp layout 0d370a24cdcaf6d3fd7f0316855522b79df0fe9a 3583986e89 Finished PCB, passes all passable DRCs Show-stopping bugs needing bodges: Errant connection.

0.920074 0.090682 0.381103 vertex -10.1139 0.
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(476nF?) for C1 - Ceramic 104s for C10.

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