3
1
Back

9.353808e+01 3.455000e+01 vertex -9.390495e+01 9.260618e+01 1.055000e+01 facet normal -0.0189296 -0.080194 0.9966 vertex 5.19298 5.19298 6.86102 vertex 5.17982 -5.20899 6.86125 vertex 0 -9.14279 3.76384 vertex -8.81405 -1.79875 3.82299 facet normal -0.382434 0.0376634 0.923215 vertex -1.78367 8.96712 3.76384 vertex -1.79875 8.81405 3.82299 facet normal -0.50788 0.489712 0.708689 vertex -5.62839 -4.67928 7.09583 facet normal -5.477276e-002 9.390116e-002 9.940737e-001 facet normal 0.195093 -0.980785 -1.68839e-05 facet normal 0.0363633 0.0926524 -0.995034 vertex 3.08871 9.50606 0.0473591 facet normal -0.464683 0.695452 -0.548102 vertex 2.37646 -2.37646 18.4724 vertex 2.53292 -1.92427 18.6572 facet normal -0.865139 -0.436801 0.246453 facet normal 0.0973868 0.995182 0.0113607 facet normal 3.267693e-001 5.718467e-001 7.524714e-001 facet normal -7.425925e-001 6.697436e-001 0.000000e+000 vertex -5.367797e+000 1.709973e+000 2.496000e+001 vertex -6.992785e+000 -9.744930e-001 9.983999e+000 vertex 4.158177e+000 3.825264e+000 9.983999e+000 vertex 5.517357e+000 -1.375710e+000 9.983999e+000 vertex 5.558580e+000 1.123793e+000 2.496000e+001 vertex -5.497466e+000 -4.471825e+000 1.747200e+001 facet normal 4.720713e-001 -8.093069e-001 3.495297e-001 vertex -1.305841e+000 3.863954e+000 2.475471e+001 facet normal 0.904824 -0.425785 0 Latest commits for file Schematics/SynthMages.pretty/Perfboard_1x12.kicad_mod # Temporary files *.lck # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole Total plated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file Unescape Hardware/Panel/precadsr-panel/fp-lib-table Normal file Unescape left_rib_x = thickness * 1; right_rib_x = width_mm - thickness*2; // pcb_holder(h=10, l=top_row-rail_clearance*2-15-thickness, th=1.15, wall_thickness=1); if (anchor_hole=="left" || anchor_hole=="both") { text(string, size.

New Pull Request