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Drawing: https://ww2.minicircuits.com/pcb/98-pl225.pdf Footprint for Mini-Circuits case GP731 (https://ww2.minicircuits.com/case_style/GP731.pdf) following land pattern PL-236, including GND vias (https://ww2.minicircuits.com/pcb/98-pl236.pdf Footprint for SSR made by many individuals. For exact contribution history, see the documentation. Condition "A.Type == 'via'" condition "A.Type == 'track' && B.Type == A.Type && A.Net != B.Net" (condition "A.Type == 'track'" ; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Thu Aug 12 11:11:04 2021 ; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Sat Aug 7 13:39:59 2021 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Latest commits for file Images/precadsr-panel.png master PSU/Synth Mages Power Word Stun.kicad_prl create mode 100644 Fireball/Fireball.kicad_pro create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Wall_wart_A-4118.kicad_mod create mode 100644 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel.gbrjob create mode 100644 3D Printing/Rails/36hp_outie.stl | Bin 69096 -> 77965 bytes 3D Printing/Rails/36hp_outie.stl | Bin 0 -> 23847 bytes Panels/FireballSpell_Large.webp | Bin 0 -> 510084 bytes // Height of the Program does not grant permission to copy, modify, and/or distribute this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS LIABLE FOR ANY CLAIM, DAMAGES OR OTHER DEALINGS IN THE SOFTWARE. The MIT License Copyright (c) 2016-2018, The Cytoscape Consortium. Permission is hereby granted, free of charge, to any person obtaining a copy Copyright (c) 2020 Titus Wormer Permission is.

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