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100k | Resistor | | | D6, D7 | 2 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: T5 15.200mm 0.5984" (1 hole Total plated holes Total unplated holes count 16 Not plated through holes: merged pull request synth_mages/MK_VCO#5 b554ec2138 Add footprint items for panel holes; separate panel and pcb into different files Add footprint items for panel holes; separate panel and.

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