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Ignored # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes count 16 ============================================================= Total unplated holes count 16 Not plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file View File Panels/futura medium condensed bt.ttf' Panels/futura medium bt.ttf differ From bd1352a04758cae219e0aacbd5a2aa50aa4d1b79 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Notes from debugging Latest commits for file Synth_Manuals/Module Summaries.ods Normal file View File Examples/precadsr.pdf Normal file View File 3D Printing/Cases/Eurorack 2-Row/4c327a694daeb206e2eed537a2001b91_preview_featured.jpg Executable file View File 3D Printing/Cases/Eurorack Modular Case/20210926_092147.jpg Executable file View File resistor_keyboard.diy Executable file View File Panels/fireball_vco_14hp_v1.scad Normal file Unescape 3D Printing/Cases/Eurorack Modular Case/20210926_092448.jpg Executable file View File 3D Printing/Rails/36hp_innie.stl create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/DPDT-toggle-switch-1M-seriesx.kicad_mod.

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