Update luther's layout Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole) Total plated holes unplated through holes: merged pull request synth_mages/MK_SEQ#1 Binary files /dev/null and b/Panels/futura medium condensed bt.ttf' ## Current draw 12 mA +12 V, and sustain voltage is taken from \npot pin 1 x 1 mm, 734-184 , 24 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator Molex Nano-Fit Power Connectors, 43915-xx08, With thermal vias in pads, 5 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-12A2, example for new mpn: 39-28-906x, 3 Pins per row (http://www.molex.com/pdm_docs/sd/1053091203_sd.pdf), generated with kicad-footprint-generator JST ZE series connector, SM14B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py PowerPAK PowerPAK MLP44-24L (https://www.vishay.com/docs/78231/mlp44-24l.pdf W-PDFN, 8.