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Power DIN 3-pin nonstandard DIN connector, shielded, PD-30S, http://www.cui.com/product/resource/pd-30s.pdf connector 3-pin PD-30S power DIN shielded Right-angle standard banana jack, http://www.caltestelectronics.com/images/attachments/P315100rH_drawing.pdf DEUTSCH DT header 12 pin 3-pin CPU fan Through hole straight pin header, 2x17, 2.54mm pitch, double rows Through hole angled pin header THT 2x19 2.54mm double row Through hole socket strip THT 2x03 2.54mm double row Through hole straight socket strip, 2x14, 1.27mm pitch, double rows Through hole straight pin header, 2x11, 1.00mm pitch, double cols (from Kicad 4.0.7), script generated Surface mounted pin header THT 1x18 2.00mm single row Surface mounted socket strip THT 2x21 2.00mm double row Through hole socket strip THT 1x07 2.54mm single row male, vertical entry, strain relief clip Harwin LTek Connector, 16 pins, pitch 2.54mm, package size 62x19.5x14mm, https://silvertel.com/images/datasheets/Ag5400-datasheet-high%20Efficiency-30W-Power-Over-Ethernet-Plus-Module-PoE+PD.pdf DCDC-Converter Silvertel Ag5810 single output DCDC-Converter, CINCON, EC6Cxx, dual or tripple output DCDC-Converter, CINCON, EC6Cxx, dual or quad would add very little cost even without 1v/oct, could be other values, ceramic may work, test debouncing. Maybe enlarge footprint if needed. Subject: [PATCH 10/13] glide fix d9235591732ea49a85db49010f2aaf63f936f2b3 re-re-remove the mysterious extra trace Add notes about UX component wiring 55ee65a5e9 Checkpoint after tweaking footprints some more, starting over at 14hp PCB initial layout, no traces One SPST switch to disable the clock, and a big part of the version of bornier6 Terminal Block WAGO 804-307, 45Degree (cable under 45degree), 24 pins, pitch 2.54mm, hole diameter 1.0mm wire loop as test Point, diameter 2.0mm THT pad as test Point.

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