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BackPin (http://www.ti.com/lit/ds/symlink/drv8801.pdf#page=31 MO-220 variation VJJD-2), generated with kicad-footprint-generator ipc_gullwing_generator.py LQFP, 160 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_gullwing_generator.py ON Semi DFN5 5x6mm 1.27P SO-8FL CASE 488A ON Semiconductor 506CN.PDF DC8 Package 8-Lead Plastic Small Outline (SO), see https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DIPD-Selection-Guide_AV00-0254EN_030617.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430884105675&ssbinary=true 6-pin plasic small outline package; 28 leads; body width 7.5 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot510-1_po.pdf TSSOP, 44 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/39935c.pdf#page=152), generated with kicad-footprint-generator Hirose DF12C SMD, DF12C3.0-36DS-0.5V, 36 Pins per row (https://www.hirose.com/product/en/products/DF63/), generated with kicad-footprint-generator ipc_noLead_generator.py LFCSP, 32 Pin (https://www.jedec.org/standards-documents/docs/mo-142-d variation DD), generated with kicad-footprint-generator ipc_gullwing_generator.py HTSSOP, 20 Pin (JEDEC MO-153 Var DB-1 https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator Hirose DF11 through hole, DF13-14P-1.25DSA, 14 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py QFN, 48 Pin (https://www.jedec.org/standards-documents/docs/mo-142-d variation BA), generated with kicad-footprint-generator Soldered wire connection with feed through strain relief, for a single 1.5 mm² wires, reinforced insulation, conductor.
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