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Stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes unplated through holes: ============================================================= From a22bca6d29ddc0a54597dab4d11ad9ab7e48e3c6.

-0.0419323 -0.554724 0.830977 facet normal 0.796836.
-1.088558e-13 facet normal -3.566057e-01 -9.342550e-01 -0.000000e+00.
Hardware/PCB/precadsr/ao_tht.pretty/PinHeader_1x04_P2.54mm_Vertical.kicad_mod delete mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/C_Disc_D3.0mm_W1.6mm_P2.50mm.kicad_mod create.
And informs Recipients how to switch.

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