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Y="3.8"/> Update luther's layout Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: merged pull request 'Put title box in PDF export' (#4) from schematic into main ... Put title box in PDF export Merge pull request 'More schematics' (#3) from schematic by Eeschema 5.1.10-88a1d61d58~88~ubuntu20.04.1 **Component Count:** 74 **Component Count:** 77 **Component Count:** 74 **Component Count:** 77 **Component Count:** 75 0 0 N N 1 F N DEF SW_DPST_Temperature SW 0 0 Y N 1 F N DEF SW_SP3T SW 0 40 Y N 1 F N DEF power_GND #PWR 0 0 vertex -0.388301 -10.1521 0 facet normal 7.257977e-001 -6.879082e-001 0.000000e+000 vertex -6.892284e+000 1.461804e+000 9.983999e+000 vertex -1.391214e+000 -5.517757e+000 1.747200e+001 facet normal 0.84429 0.451284 0.288993 facet normal -0.288321 -0.956943 0.0336375 facet normal 0.618852 0.265169 0.739397 facet normal -4.866834e-001 8.343590e-001 2.588132e-001 vertex 4.334138e+000 -3.361386e+000 2.475471e+001 facet normal 0.0980088 -0.995114 -0.0119414 facet normal -0.468635 0.876739 0.108209 vertex -2.5504 5.20733 21.335 facet normal 0.0546376 -0.554748 0.830223 facet normal 2.502911e-15 -1.000000e+00 -1.026775e-14 facet normal -2.340998e-01 0.000000e+00 9.722126e-01 vertex -1.057894e+02 9.725134e+01 8.925305e+00 vertex -1.057894e+02 9.715134e+01 8.925305e+00 vertex -1.057894e+02 9.715134e+01 8.925305e+00 vertex -1.057894e+02 9.665134e+01 8.925305e+00 vertex -1.057894e+02 9.665134e+01 8.925305e+00 vertex -1.057894e+02 9.665134e+01 8.925305e+00 vertex -1.056213e+02 9.695134e+01 8.965788e+00 facet normal -5.000001e-001 -8.660254e-001 0.000000e+000 facet normal -0.0622132 0.0777088 0.995033 facet normal -0.507679 0.48977 0.708793 facet normal -0.463926 -0.883075 -0.0703615 vertex -0.605695 -9.62726 3.53708.

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