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257 Ball, 19x19 Layout, 0.8mm Pitch, https://www.st.com/resource/en/datasheet/stm32mp151a.pdf ST LFBGA-448, 18.0x18.0mm, 448 Ball, 22x22 Layout, 0.8mm Pitch, https://www.micron.com/-/media/client/global/documents/products/data-sheet/dram/ddr3/4gb_ddr3l.pdf#page=26 ST uTFBGA-36, 0.25mm pad, 3.6x3.6mm, 36 Ball, 6x6 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32wb15cc.pdf#page=119 ST WLCSP-52, ST die ID 494, 3.3x3.38mm, 49 Ball, 7x7 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32wb15cc.pdf#page=119 ST WLCSP-52, ST die ID 460, 2.3x2.48mm, 25 Ball, 5x5 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g491re.pdf ST WLCSP-81, ST die ID 464, 2.58x3.07mm, 36 Ball, 6x6 Layout, 0.4mm Pitch, https://pdfserv.maximintegrated.com/package_dwgs/21-100489.PDF WLCSP-25, 5x5 raster, 2.133x2.070mm package, pitch 0.4mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f746zg.pdf WLCSP-144, 12x12 raster, 10x10mm package, pitch 0.4mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f100v8.pdf TFBGA-100, 10x10 raster, 10x10mm package, pitch 0.4mm; https://www.latticesemi.com/view_document?document_id=213 UFBGA-15, 4x4, 3x3mm package, pitch 0.35mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f411vc.pdf WLCSP-49, 7x7 raster, 3.89x3.74mm package, pitch 0.8mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32f207vg.pdf WLCSP-66, 8x9 raster, 3.767x4.229mm package, pitch 0.4mm; http://www.fujitsu.com/global/documents/products/devices/semiconductor/fram/lineup/MB85RS1MT-DS501-00022-7v0-E.pdf Infineon LFBGA-292, 0.35mm pad, 17.0x17.0mm, 292 Ball, 20x20 Layout, 0.8mm Pitch, https://www.st.com/resource/en/datasheet/stm32mp151a.pdf ST TFBGA-225, 13.0x13.0mm, 225 Ball, 15x15 Layout, 0.8mm Pitch, https://www.micron.com/-/media/client/global/documents/products/data-sheet/dram/ddr3/4gb_ddr3l.pdf#page=26 ST uTFBGA-36, 0.25mm pad, 3.6x3.6mm, 36 Ball, 6x6 Layout, 0.5mm Pitch, WSON-8, http://www.ti.com/lit/ds/symlink/lm27761.pdf WSON 8 1EP ThermalVias WSON, 8 Pin (http://www.fujitsu.com/ca/en/Images/MB85RS2MT-DS501-00023-1v0-E.pdf), generated with kicad-footprint-generator Molex KK 396 Interconnect System, old/engineering part number: 26-60-5100, 10 Pins per row (http://www.molex.com/pdm_docs/sd/431602102_sd.pdf), generated with kicad-footprint-generator Molex SPOX Connector System, 43045-1621 (alternative finishes: 43045-180x), 9 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator Molex KK-254 vertical Molex 0.50mm Pitch Easy-On Type FFC/FPC, 502250-4191, 41 Circuits (http://www.molex.com/pdm_docs/sd/5022504191_sd.pdf), generated with kicad-footprint-generator Hirose series connector, DF3EA-10P-2H (https://www.hirose.com/product/document?clcode=CL0543-0332-0-51&productname=DF3EA-5P-2H(51)&series=DF3&documenttype=2DDrawing&lang=en&documentid=0001163317), generated with kicad-footprint-generator Connector Phoenix Contact, SPT 2.5/2-H-5.0 1990973 Connector Phoenix Contact connector footprint for: MSTB_2,5/6-GF-5,08; number of steps // 5 sockets: // CLOCK in - glide in (j16/j17 // cv out (j7/j6) // pause cv in (j18/j19 // 1 to set output voltages. (10) One potentiometer per step, to enable/disable gate per step. (10 - One potentiometer per step, to set output voltages. (10) One potentiometer per step, to set output voltages. (10) - One potentiometer per step, to indicate direction? Pointer1 .

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