Labels Milestones
BackSlots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes T4 10.000mm 0.3937" (4 holes T5 15.200mm 0.5984" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Not plated through holes are merged with plated holes unplated through holes: unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole) T3 7.000mm 0.2756" (6 holes T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 16 ============================================================= Total unplated holes count 0 Minor layout tweaks Finish schematic, add PDF' (#2) from schematic into main Reviewed-on: https://gitea.circuitlocution.com/synth_mages/MK_VCO/pulls/4 Put title box in PDF export' (#4) from schematic by Eeschema 5.1.10-88a1d61d58~90~ubuntu20.04.1 **Component Count:** 76 | Refs | Qty | Component | Description | Manufacturer | Part | Vendor | SKU | | | D1, D2 | 2 | 1N5817 | Schottky Barrier Rectifier Diode, DO-41"/>