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F.SilkS" "Notes": "Layer F.SilkS" "Notes": "Layer F.Mask" "Notes": "Layer F.Paste" "Notes": "Layer F.SilkS" "Notes": "Layer F.Mask" "Notes": "Layer B.Paste" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer F.Mask" "Notes": "Layer F.SilkS" "Notes": "Layer B.Paste" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Sat Aug 7 13:39:59 2021 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes T5 15.200mm 0.5984" (1 hole Total plated holes Total unplated holes count 0 Minor layout tweaks Minor layout tweaks Minor layout tweaks From c6e6a61475df01d4832847208a59070c5a40c498 Mon Sep 17 00:00:00 2001 Subject: [PATCH] KiCad lib tables Hardware/Panel/precadsr-panel/fp-lib-table | 4 Hardware/PCB/precadsr/precadsr.sch | 1954 82024e96c9 Go to file Open with Intellij IDEA f33ea6a168 Add scad for v3.2 3afa35e4b1 PCB initial layout, no.

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