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Back613d1b6f7ef8de710893bbeb40d56c8d26d50247 @circuitlocution.com created pull request 'Fix rail clearance issues, make all power traces large Add ground fills, fix some clearance issues, make all power traces large Added input resistor for sync; placed everything on PCB with on-board components Moritz Klein (https://www.ericasynths.lv/shop/diy-kits-1/edu-diy-vca/) Features: If we expect or plan on developing modules which use the 4 pins for trigger, gate, and CV routing updates to rev 2 beta by adding +5V, and both trigger/gate and CV routing 605f29538d edits README.md file adds README.md file again gets comfier with gitignore and git rm --cache b284a71188b23f9f8c43bee1fcce2820249f4384 learns about gitignore and git rm --cache 7130143159 learns about gitignore and git rm --cache 713014315986726ad96f361cfbc8e67551a6a879 power word stun initial commit by Synth Mages Power Word Stun.kicad_prl | 4 .../precadsr_Gerbers/precadsr-Edge_Cuts.gbr | 4 Hardware/PCB/precadsr/potsetc.sch | 4 .../PCB/precadsr_Gerbers/precadsr-F_Mask.gbr | 4 | 1M | Resistor | | | | | | J9 | 1 | 10 nF | Unpolarized capacitor | | J7 | 1 | Conn_01x02 | SIP socket, 2.54 mm, 1x2 (see [build notes](build.md | | Tayda | A-553 | | | R3, R7 | 3 | 22k | Resistor | | R14 | 1 | ICM7555xP | CMOS General Purpose Timer, 555 compatible, PDIP-8"/>