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BackFile Synth_Manuals/Module Summaries.ods | Bin 0 -> 38764 bytes Panels/futura medium condensed bt.ttf' 16055f0ae5 Delete 'Panels/futura medium condensed bt.ttf Normal file View File Mon 10 May 2021 12:33:34 AM EDT Generated from schematic into main ... Add notes about UX component wiring 55ee65a5e9 Checkpoint after converting most things to SMD 53c46eece1 Still trying to add picture 53c90c58d81dff355f8b17948a9b73c895233eb2 Add notes about wiring SW15 cross-board Add design rules for jlcpcb Add design rules for jlcpcb Add some perfboard sections, power headers, teardrops From 9e7b04561b8893062b3378503805ddd100c7260f Mon Sep 17 00:00:00 2001 Binary files /dev/null and b/Panels/FireballSpellVertSmaller.png differ Binary files a/3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels/POLYMORPH.png' 9bb3093b2bc14210884f0107e7a2898b2161266b Delete '3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels/SPIDER CLIMB.png 8576ad9482 Added input resistor for sync; placed everything on PCB sandwich, making some final-ish decisions about connecting to front panel candidates v1 and v2
Added schmancy pcb for v1 build Latest commits for file Panels/FireballSpell_Large_bw.png.svg Latest commits for file Images/loop.png d8deca9307 Delete '3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels/MIRROR IMAGE.png' Panel Style Guide Add Panel Style Guide From 4c5e03f875a81278be4b8089dd10dd98b0c86e5d Mon Sep 17 00:00:00 2001 .../Panels/BLADE BARRIER.png | Bin 0 -> 121262 bytes Panels/FireballSpell_Large_bw.png | Bin 138868 -> 139972 bytes Docs/precadsr_bom.md | 3 | 1k | Resistor | | | R1, R10, R11 | 3 | 2N3904 | 0.2A Ic, 40V Vce, Small Signal NPN Transistor, TO-92"/>