Labels Milestones
BackVertical, Latch (source: https://suddendocs.samtec.com/prints/t1m-single-row-footprint.pdf Samtec Micro Mate Discrete Wire Terminal Strip, 1.00 mm Pitch, Single Row, Vertical (source: https://suddendocs.samtec.com/prints/t1m-single-row-footprint.pdf conn samtec card-edge high-speed Highspeed card edge connector for 1.6mm PCB's with 60 contacts (polarized Highspeed card edge connector for 2.4mm PCB's with 08 contacts (polarized Highspeed card edge connector for PCB's with 08 contacts (not polarized Highspeed card edge connector for IQRF TR-x2D(C)(T) modules, http://iqrf.org/weben/downloads.php?id=104 Bluetooth v4.2 + NFC module Modtronix Wireless SX1276 LoRa Module (http://modtronix.com/img/prod/imod/inair9/inair_dimensions.gif Modtronix LoRa inAir inAir9 SX1276 RF 915MHz 868MHz Wireless RAK811 LPWAN Module https://downloads.rakwireless.com/LoRa/RAK4200/Hardware-Specification/RAK4200_Module_Specifications_V1.4.pdf Class 2 Bluetooth Module with on-board components PCB initial layout, no traces PCB initial layout, no traces Initial kicad, images, gitignore for kicad backups afea9d5a2c Final revision; added custom DRC as project file version 1) #Kicad 7 From 97a7a0b59762910e1238688f287f725f632d4e8f Mon Sep 17 00:00:00 2001 Subject: [PATCH] Delete '3D Printing/Panels/SPIDER CLIMB.png' Delete '3D Printing/Panels/SPIDER CLIMB.png' 3D Printing/Panels/SPIDER CLIMB.png Normal file Unescape Hardware/PCB/precadsr/Kosmo_panel.pretty/Kosmo_Panel_Dual_Mounting_Holes.kicad_mod Normal file View File 3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels/MAGIC MISSILE VCF.png' Delete '3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels/BLADE BARRIER.png' From 4f6e9e0984f9a003c1c3b6aa2f03c4a9a8708f29 Mon Sep 17 00:00:00 2001 Subject: [PATCH 09/13] Notes from debugging More notes Schematics/schematic_bugs_v1.txt | 2 pin Molex connector 2.54 mm spacing | | | | Taydaa | A-4755 | | | | Tayda | A-1847 | | | | | D3, D4, D5, D8, D9, D10 | 8 "active_layer_preset": "All Copper Layers", re-re-remove the mysterious extra trace 5040873587dbb57684343269abab88d35cf7124b Update Schematics/schematic_bugs_v1.md Update Schematics/schematic_bugs_v1.md Clock POT is too small.
- Ipc_gullwing_generator.py MSOP, 8 Pin (https://docs.broadcom.com/docs/AV02-4755EN), generated with kicad-footprint-generator.
- Vertex -1.73373 -8.71606 5.07603 facet normal 0.366307 0.925191.
- Pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=299, NSMD pad definition.