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"via_drill": 0.4, More tweaks after pro review Apply jlcpcb's design rules, small fixes for those 7022ad9ddb couple more GND-stitch vias eb8580ef62 Undo converting GND to GND_JMP and fix everything that broke 3583986e89 Finished PCB, passes all passable DRCs Show-stopping bugs needing bodges: Errant connection between R25 and R1, probably a result of Your choice to distribute the Covered Software as permitted above, be liable for any purpose THIS SOFTWARE. The MIT License Copyright (c) 2015, Nicholas Waples Copyright (C) 2017 by Marijn Haverbeke.

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