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0.8 CLG400 CL400 Zynq-7000 BGA, 22x22 grid, 19x19mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=80, NSMD pad definition Appendix A BGA 196 0.5 CPGA196 Artix-7 BGA, 26x26 grid, 27x27mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=306, NSMD pad definition Appendix A BGA 1156 1 FF1156 FFG1156 FFV1156 Virtex-7 BGA, 42x42 grid, 42.5x42.5mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=300, NSMD pad definition Appendix A Virtex-7 BGA, 42x42 grid, 42.5x42.5mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=265, NSMD pad definition Appendix A BGA 196 0.5 CPGA196 Artix-7 BGA, 22x22 grid, 23x23mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=297, NSMD pad definition, 0.8875x1.3875mm, 5 Ball, 2x3 Layout, 0.35mm Pitch, https://www.onsemi.com/pdf/datasheet/ncp163-d.pdf#page=23 6pin Pitch 0.4mm X2SON-8 1.4x1mm Pitch0.35mm http://www.ti.com/lit/ds/symlink/pca9306.pdf Maxim Integrated TSOC-6 D6+1,https://datasheets.maximintegrated.com/en/ds/DS2401.pdf, https://pdfserv.maximintegrated.com/land_patterns/90-0321.PDF ATPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-5-1/ TO-263/D2PAK/DDPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-7-1/ D2PAK DDPAK TO-263 D2PAK-7 TO-263-7 SOT-427 TO-263 / D2PAK / DDPAK SMD package, orientation marker at cathode, https://optoelectronics.liteon.com/upload/download/DS22-2009-0099/LTW-M670ZVS-M5_0906.pdf LED RGB NeoPixel Nano 2020 Latest commits for file Panels/FIREBALL VCO.png Normal file Unescape // Width of module (HP) width = 36; // [1:1:84] square_out = [output_column, bottom_row, 0]; cv_in = [first_col, fifth_row, 0]; square_out = [width_mm-h_margin, row_1, 0]; fm_pot = [input_column - h_margin/2, bottom_row, 0]; pwm_duty = [width_mm - h_margin - working_width/8, row_2, 0]; audio_in_2 = [left_col, row_3, 0]; cv_in_2b = [right_col, row_3, 0]; pwm_duty = [width_mm - h_margin - working_width/8, row_3, 0]; manual_2 = [left_col, row_2, 0]; cv_2b_atten = [right_col, row_3, 0]; cv_in_2b = [right_col, row_5, 0]; cv_in_2a = [left_col, row_7, 0]; audio_out_1 = [right_col, row_2, 0]; pwm_in = [width_mm - h_margin - working_width/8, row_2, 0]; audio_in_2 = [left_col, row_7, 0]; cv_in_1b = [right_col, row_7, 0]; audio_out_1 = [right_col, row_5, 0]; cv_in_2a = [left_col, row_6, 0]; cv_1b_atten = [right_col, row_6, 0]; cv_1b_atten = [right_col, row_2, 0]; fm_lvl = [h_margin+working_width/8, row_3, 0]; cv_in_2b = [right_col, row_7, 0]; cv_in_1b = [right_col, row_5, 0]; audio_out_1.

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