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PG-DSO 12 pin, exposed pad: 4.5x8.1mm, with thermal vias; see figure 8.2 of https://www.silabs.com/documents/public/data-sheets/efm8bb1-datasheet.pdf TDFN, 6 Pin (https://docs.broadcom.com/docs/AV02-4755EN), generated with kicad-footprint-generator Thick Film Chip Resistor Network, ROHM MNR34 (see mnr_g.pdf Precision Thin Film Chip Resistor Network, ROHM MNR15 (see mnr_g.pdf SMT resistor net, Bourns CAT16.

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