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Decade counter expects CLOCK to pass 1/2 of V+ (i.e. 6v) but many external clock signal, start/stop, manual step button in Unseen Servant Binary files /dev/null and b/Panels/luther_triangle_vco_quentin_v3_blank.stl.stl differ Binary files /dev/null and b/VCO_MANUAL_v2.pdf differ 500k Trimpot; tune to 1V out HALF Dot1 Dot2 Dot3 Dot4 Dot5 Dot6 Dot7 Dot8 Dot9 Dot10 Dot11 Dot12 Dot13 W1 L2 <-- CV In - diode to U2-3 Clock In Normal - 1k to U2-8 (AND NOT short to U2-10 - Clock rate goes down when resistance goes up, opposite to expectation. Schematic fixes: Trim 5mm from vertical for both.

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