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Pcbnew default_label_font = "Futura Md BT:style=Medium"; STLs, 10hp version, others schematics STLs, 10hp version, others schematics b404e3f9c5 Update luther's layout BOTH false Directional false false Update luther's layout Update luther's layout Update luther's layout footprint "P160_pot_hole_nonpcb" (version 20221018) (generator pcbnew Latest commits for file Schematics/SynthMages.pretty/C_Rect_L22.0mm_W6.1mm_P20mm_MKT_BIG_RED_CAP.kicad_mod (grid_origin -1.27 106.172 (grid_origin 121.92 119.38 "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer B.Cu" "Notes": "Layer F.Mask" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer F.Paste" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Thu Aug 12 11:11:04 2021 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= b1fcba1e78f37669542b35a3e32a5257c5c0240c b1fcba1e78f37669542b35a3e32a5257c5c0240c d9153c70802a10d2fe554f80f1a497b409aac630 2cddc4d62d38c9e1b69839f92a19e7915eecbceb formatting caixa bits caixa_sr1.png | Bin 70804 -> 71304 bytes viewBox="0 0 8.5 11" d="m 2.1692854,6.5787405 h 0.622047 V 7.200788 H 2.3346394 2.1692854,7.0433077 Z" d="m 2.1692865,8.5472429 h 0.622047 V 9.1692904 H 2.3346405 2.1692865,9.0118101 Z" d="m 2.1692865,8.5472429 h 0.622047 V 7.200788 H 2.3346394 2.1692854,7.0433077 Z" d="m 3.1141734,8.5472427 h 0.622047 v 0.6220475 h -0.456693 -0.165354,-0.1574803 z" style="font-style:normal;font-variant:normal;font-weight:normal;font-stretch:normal;font-size:0.194444px;font-family:Limelight;-inkscape-font-specification:'Limelight, Normal';font-variant-ligatures:normal;font-variant-caps:normal;font-variant-numeric:normal;font-feature-settings:normal;text-align:center;writing-mode:lr-tb;text-anchor:middle;fill:#000000;stroke-width:0.0104167">KASSU / AO

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