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Body [LFCSP]; (see https://www.intersil.com/content/dam/Intersil/documents/l72_/l72.10x10c.pdf LFCSP VQ, 48 pin, exposed pad: 4.5x8.1mm, with thermal vias in pads, 3 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py 10-Lead Plastic DFN (3mm x 2mm) (see Linear Technology 05081955_0_DHC18.pdf DHD Package; 18-Lead Plastic DFN (2mm x 2mm) (see Linear Technology 1956f.pdf TSSOP, 16 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0140.PDF (T3255-3)), generated with kicad-footprint-generator ipc_noLead_generator.py mlf 8 2x2 mm 16-Lead Quad Flat, No Lead Package (MF) - 3.3x3.3x1 mm Body with Exposed Pad [eTSSOP] (see Microchip Packaging Specification 00000049BS.pdf VQFN, 16 Pin (https://ww1.microchip.com/downloads/en/DeviceDoc/16L_VQFN-WFS_3x3mm_4MX_C04-00508a.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py SOIC, 16 Pin (http://www.ti.com/lit/ds/symlink/lmh0074.pdf#page=13), generated with kicad-footprint-generator Molex CLIK-Mate series connector, B05B-XASK-1-A (http://www.jst-mfg.com/product/pdf/eng/eXA1.pdf), generated with.

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